Technological change has brought the global market into broad industrialization and modernization. One major application in the semiconductor industry demands safety and high reliability with strict compliance requirement. This technical paper focuses on the package design soluti...
Open access
Research Article10.9734/jerr/2021/v20i317273
This paper presents a modified substrate design that would enable a bottom electromagnetic interference (EMI) shielding protection for EMI sensitive integrated unit (IC). The modified substrate design is applied and incorporated to the existing and known shielding technique to fu...
Open access
Research Article10.9734/jerr/2020/v17i217184
This paper focused on the integration of metallized silicon die in design layout of quad-flat no-leads package (QFN) and ball grid array (BGA) devices. The metallized silicon die is fabricated with a conductive top layer where the junction for wire interconnection is created. The...
Open access
Research Article10.9734/jerr/2020/v14i417131
With the new die technology becomes smaller and thinner, silicon die circuit metallization also becomes smaller, thus electronic devices like quad-flat no-leads multi-row (QFN-mr) semiconductor leadframe package design become more sensitive and prone to electrostatic discharge (E...
Open access
Research Article10.9734/jerr/2020/v14i317126
The paper presents a design and study of impedance matching for radio frequency (RF) circuit application of common-source amplifier topology. Matching networks for input and output sides of the amplifier were determined from the S-parameters given for the transistor at frequency...
Open access
Research Article10.9734/jerr/2020/v12i217076
The current manuscript aimed to study a differential active balun circuit in terms of the small-signal analysis, implemented in a standard 90-nm complementary metal-oxide semiconductor (CMOS) technology. Small-signal or alternating current (AC) response or frequency response of t...
Open access
Research Article10.9734/jerr/2020/v10i417043
The paper offers an improvement for leadframe devices to mitigate the occurrence of package chipping rejection during package mechanical singulation. The discussion provides a specialized design of mold chase for mold encapsulation process, and an augmented mechanical cutting tec...
Open access
Research Article10.9734/jerr/2020/v10i217033
This technical paper presents a study of wirebond selection highlighting the package electrical modeling and simulation done for semiconductor integrated circuit (IC) leadframe package (hereinafter referred to as Device Z) with different wirebond configurations: Gold 2N 1.3 mil,...
Open access
Research Article10.9734/jerr/2019/v7i316970
This paper presents a design and simulation study of a common-gate with common-source active balun circuit implemented in a standard 90-nm complementary metal-oxide semiconductor (CMOS) process. The active balun design is intended for worldwide interoperability for microwave acc...
Open access
Research Article10.9734/jerr/2019/v6i116939
The paper presents a design and simulation study of a differential active balun circuit implemented in a standard 90 nm complementary metal-oxide semiconductor (CMOS) process. The active balun design is intended for Worldwide Interoperability for Microwave Access (WiMAX) applica...
Open access
Research Article10.9734/jerr/2019/v4i416908
This research paper presents a design and study of a common-source/drain active balun circuit implemented in a standard 90-nm complementary metal-oxide semiconductor (CMOS) technology. The active balun design is intended for worldwide interoperability for microwave access (WiMAX...
Open access
Research Article10.9734/jerr/2019/v4i316906
This technical paper presents the challenges encountered in the development of a compact and thinner package that incorporates multiple or stacked dice in one. For the case of this paper, Die1 (bottom die) is smaller than Die2 (top die) and must be the first one to be die-bonded,...
Open access
Research Article10.9734/jerr/2018/v2i416712
Differential implementation is becoming highly popular in Radio Frequency Integrated Circuit (RFIC) design, notably for its high immunity to common-mode noises, acceptable rejection of parasitic coupling, and increased dynamic range. One RF front-end building block that is usuall...
Open access
Research Article10.9734/jerr/2018/v2i310956
Glass die are one of the materials used by semiconductor plants during production of specialized quad-flat no-leads (QFN) products. With its transparent appearance and fragile characteristics, several challenges are encountered and analyzed to resolve unwanted issues and to have...
Open access
Research Article10.9734/jerr/2021/v20i617326
As the modern world evolves through innovation and technology, manufacturing companies of semiconductor drive their people to dedicate themselves on continuous improvement and technical advancement. Products they produce becomes smaller and thinner, but applications are limitless...
Open access
Research Article10.9734/jerr/2021/v20i517313
Innovations and breakthroughs are continuously driven in semiconductor manufacturing to overcome existing assembly limitations and recurring difficulties. This paper is focused on the resolution of the delamination issue during die attach assembly process. A new design of semicon...
Open access
Research Article10.9734/jerr/2021/v20i417303
Wirebonding is one of the most challenging assembly manufacturing processes in semiconductor packaging industry. This paper discussed the wirebonding challenge and the solution to mitigate misplaced ball issues and prevent pattern recognition alignment errors. Parameter optimizat...
Open access
Research Article10.9734/jerr/2021/v20i317283
Intermetallic is a critical factor that is controlled and limit during manufacturing of integrated units. Through improving the ball flatness response of the semiconductor wire significantly impact the outcome for the intermetallic characteristic between metal such as Gold-Alumin...
Open access
Research Article10.9734/jerr/2021/v20i217259
Electromagnetic interference (EMI) is an unwanted disturbance caused by external sources that would affect the electrical functionality of the device. This paper presents an advanced approach of electromagnetic interference (EMI) shielding protection for sensitive and critical se...
Open access
Research Article10.9734/jerr/2020/v19i417238
With the new devices and new technologies in semiconductor industry are getting more challenging to process because of new processes and process bricks. One of the most challenging assembly processes is the pick and place or the die attach process. Issues were encountered during...
Open access
Research Article10.9734/jerr/2020/v17i317187
Process improvement through modification in the design of indirect material is one potential direction to improve the productivity during assembly manufacturing. In this paper, an augmented design of anvil block is presented to reduce the crumpled strips, leadframe bending and de...
Open access
Research Article10.9734/jerr/2020/v17i217182
One of the challenging assembly processes in semiconductor manufacturing industry is stencil printing using solder paste as direct material. With this technology, some issues were encountered during the development phase of an advanced leadframe device and one of which is the sol...
Open access
Research Article10.9734/jerr/2020/v16i417176
The paper focused on the elimination of die crack occurrence at the diebond process. Design of experiment (DOE) was done on the pick and place rubber-tip design and an improved design was finalized. The improved rubber-tip configuration with smaller vacuum design and full contact...
Open access
Research Article10.9734/jerr/2020/v12i217074
The relentless advancement and trends on thinner packages have become the focus in the semiconductor manufacturing industry. The requirement of thinner packages also demands a thinner vertical structure of the semiconductor electronic design. As a major contributor on the vertica...
Open access
Research Article10.9734/jerr/2020/v10i217037
This paper presents an improvement in the design of quad flat no-leads (QFN) leadframe material to reduce the amount of unit rejection due to excessive leadframe warpage observed after die attach curing (DAC) process. The enhanced leadframe design includes modification through in...
Open access
Research Article10.9734/jerr/2020/v10i217035
New design for a certain issue in semiconductor industry is another way to modify the standard configuration into specified limit or to make a possible solution of the problem. This paper presents a new modified design for wirebond top plate with a bias platform structure that w...
Open access
Research Article10.9734/jerr/2019/v9i317021
Package thinning, down-scaling, and miniaturization are common interests among semiconductor industries, with each manufacturing site having different approach and technical directions in providing novelties in their products. The paper offers an innovative design of manufacturin...
Open access
Research Article10.9734/jerr/2019/v9i217014
Wafer passivation or the protective layer of the internal circuitry of the die plays a major role of providing protection and the isolation of electrical stability of the active circuit on the top area of the wafer. Passivation is normally a screen of an oxide layer on the surfac...
Open access
Research Article10.9734/jerr/2019/v6i416958
The continuous development and trends on thinner semiconductor packages have become the focus in the semiconductor industry. The necessity of thinner packages also demands a thinner vertical structure of the integrated circuit (IC) design. As a major contributor on the vertical s...
Open access
Research Article10.9734/jerr/2019/v6i216943
The development on thinner packages has become the trend and focus in semiconductor packaging industry. The necessity of thinner packages also entails a thinner vertical structure of the integrated circuit (IC) design. As a major contributor on the vertical structure of the IC pa...
Open access
Research Article10.9734/jerr/2019/v6i116936
In the semiconductor manufacturing industry, package chip-out is a common defect frequently encountered in trim and form (T/F) process. For thin shrink small outline package (TSSOP), top defect incurred during assembly manufacturing was the package chip-out located at the top su...
Open access
Research Article10.9734/jerr/2019/v5i216922
Nowadays, electronic manufacturers trend are to become thinner and thinner especially those electronic gadgets that is very handy and convenient on our daily necessity. Challenge with the leading manufacturers is the production and development of less size gadget yet with richnes...
Open access
Research Article10.9734/jerr/2019/v4i216897
The technical paper showcased a comprehensive study on laser (light amplification by stimulated emission of radiation) grooving as breakthrough and ultimate solution in wafer sawing. The project is intended to address various defects such as chippings, metal dangling/peel off, cr...
Open access
Research Article10.9734/jerr/2018/v3i416881
This technical paper discusses a methodological and systematic way of resolving key challenges during introduction of Chip-On-Lead package specifically wirebonding issues that leads to production dilemma during production ramp-up of products using copper wire in tapeless leadfram...
Open access
Research Article10.9734/jerr/2018/v3i216869
The technical paper presents a systematic and methodological approach to deal with a new product trend that will be successfully manufactured during assembly production ramp-up. The project is intended to determine the required process flow and machine platforms for high-density...
Open access
Research Article10.9734/jerr/2018/v3i116867
Wirebonding process is one of the most challenging assembly manufacturing process in semiconductor packaging industry. This paper discussed the wirebonding challenge and the solution to resolve the wire to die shorting on reverse stitch on ball (RSOB) and prevent irregular loopin...
Open access
Research Article10.9734/jerr/2021/v20i1017387
This paper presents the reformation and fabrication resolved on the wire clamp and top plate (WCTP) design to eliminate the presence of lead finger bouncing resulting to high rejection of non-stick on leads (NSOL). Problem experienced was that the hollow or half-etched portion of...
Open access
Research Article10.9734/jerr/2021/v20i1017385
The integrity of the assembly wirebond process’ 2nd bond poses a big challenge for semiconductor manufacturing of quad-flat no-leads (QFN) devices, particularly on multiple wires on a lead. These devices are vulnerable to induce or obtain broken wire at heel defect. This type of...
Open access
Research Article10.9734/jerr/2021/v20i817363
Theta rotation on die during diebond process is one of the critical machine responses especially for land grid array (LGA) device with tight tolerances requirement. The paper focuses on the die theta rotation tolerance capability with critical design for LGA device evaluated on t...
Open access
Research Article10.9734/jerr/2021/v20i817357
Package singulation process is where the whole strip was sheared to produce individual units. Existing singulation program for 1-map strip have only six (6) pattern recognition system (PRS) points along the whole strip with 240 mm length. Considering the length of the strip, it i...
Open access
Research Article10.9734/jerr/2021/v20i717349
Shopfloor practices that when the first cut line was aligned with the hairline, actual blade cut, and saw street of the strip, the succeeding cut lines will automatically follow with the same alignment. Considering various factors that affect the condition of the strip, it was re...
Open access
Research Article10.9734/jerr/2021/v20i717337
Epoxy quality contributes a great role in defining quality products of quad flat no lead multi row packages. In dealing with certain problems related to epoxy position shift caused by unoptimized design, innovation on the dispenser module is considered and focused at. This paper...
Open access
Research Article10.9734/jerr/2021/v20i617333
With the new and upcoming technologies in semiconductor industry, packages like the ball grid array (BGA) are getting more challenging to process due to inherent issues that come along. Process improvement through modification in the design of indirect material is one key directi...
Open access
Research Article10.9734/jerr/2020/v19i317231
The paper focused on the improvement done in quad-flat no-leads (QFN) leadframe package assembly to address the quantity of rejection of crumpled leadframe during handling at wirebond process station. Overload sensor at the output magazine handler was found out to be defective, h...
Open access
Research Article10.9734/jerr/2020/v19i217226
This paper presents the modification and improvement done on the wire clamp and top plate (WCTP) design to eliminate the bouncing effect of the silicon die that leads to smashed ball reject during the formation of wire. The protrusion of the unit on the vacuum hole produced movem...
Open access
Research Article10.9734/jerr/2020/v17i417195
The development of new technology with thinner and smaller packages has become the movement and focus on semiconductor assembly industry. This paper presents an improvement done in dual-flat no-leads (DFN) package to resolve the quantity of rejection due to die attach film (DAF)...
Open access
Research Article10.9734/jerr/2020/v17i317189
The paper focused on the evaluation of quad-flat no-leads (QFN) semiconductor package with small silicon die on different machine platforms to achieve a higher bond line thickness (BLT) of greater than 30 µm. The characterization or evaluation was narrowed down into two main dieb...
Open access
Research Article10.9734/jerr/2020/v14i217119
Wirebonding process is one important assembly process responsible for providing electrical connections between the silicon die and the external leads of a semiconductor package or device. The process also brings along some challenges as the device becomes more complex and critica...
Open access
Research Article10.9734/jerr/2020/v12i417084
This study aims to develop polyimide etching process on the silicon die after decapsulation to resolve the wire shear issue during ball shear data gatherings. The shear strength of the ball is affected by the presence of polyimide insulator during ball shearing process, due to th...
Open access
Research Article10.9734/jerr/2020/v12i117073
Innovations and breakthroughs either through process, equipment or material is known in semiconductor industries as a positive option in overcoming the existing limitations and assembly handicaps. This presentation discusses the assembly methodology and packaging design of a quad...
Open access
Research Article10.9734/jerr/2019/v9i417026
Strips that have undergone tape saw singulation will not be completed without the ultraviolet (UV) curing process. To detach the units from the tape, the singulated strips have required further assistance to be loaded for UV cure. Otherwise, hard-to-pick units will be the outcome...
Open access
Research Article10.9734/jerr/2021/v20i1017382
After singulation process where the strips are being cut into single units, unit tray loading comes next. Unit tray loading is the process where the singulated units will be picked up from the table and then place it in a tray pocket. Z-picker assembly executes the pick and placi...
Open access
Research Article10.9734/jerr/2021/v20i817364
The paper is focused on the glue voids reduction on critical semiconductor quad-flat no-leads (QFN) device processed on a stencil printing type of die attach machine. Process optimization through material preparation improvement was done to mitigate the silver lumps of the sinter...
Open access
Research Article10.9734/jerr/2021/v20i317275
The paper presents a practical procedure in selecting the best candidate for die attach epoxy control or anti-epoxy bleed-out (anti-EBO) concentration during the introduction of new leadframe configuration. Three different criteria were implemented to measure the relative impact...
Open access
Research Article10.9734/jerr/2020/v14i217121