Incorporating Package Grinding Process for QFN Thin Device Manufacturing
Rennier S. Rodriguez, Frederick Ray I. Gomez
Journal of Engineering Research and Reports · pp. 1–6 · Published 2 Jan 2020
10.9734/jerr/2019/v9i217014Abstract
Package thinning, down-scaling, and miniaturization are common interests among semiconductor industries, with each manufacturing site having different approach and technical directions in providing novelties in their products. The paper offers an innovative design of manufacturing flow to reduce the semiconductor package height of a Quad-Flat No-leads (QFN) device through the application of a specialized package grinding process. The process would significantly reduce the carrier thickness for the overall package height configuration of QFN. Through this integration, the common assembly barriers and defects related in producing thin devices are eliminated, thus thinner version manufacturing becomes more simplified and efficient.
References (6)
- 1 Handbook of Semiconductor Manufacturing Technology [DOI]
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Cited by 12
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Antonio Sumagpang Jr., Frederick Ray Gomez, Edwin Graycochea Jr. · Journal of Engineering Research and Reports · 2020
Maria Virginia S. Buera, Mariane A. Mendoza, Frederick Ray I. Gomez · Journal of Engineering Research and Reports · 2021
Mariane A. Mendoza, Maria Virginia S. Buera, F. Gomez · 2021
Maria Virginia S. Buera, Mariane A. Mendoza, F. Gomez · 2021
Showing 8 of 12 known citations — external sources report more than can currently be individually listed.
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