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Research Article Open access CC BY 4.0

Mitigating Wafer Edge Cut Defect through Tensionless Tape Lamination Technique

Bryan Christian S. Bacquian, Frederick Ray I. Gomez

Journal of Engineering Research and Reports · pp. 41–44 · Published 17 Jun 2020

10.9734/jerr/2020/v13i317103

Abstract

Thinner and smaller packages require thinner vertical structure of the integrated circuit (IC) design with the wafer playing essential role in package thinning. As the wafer goes thinner, problems may occur in the pre-assembly or wafer preparation. With the introduction of new pre-assembly technology such as laser die attach film (DAF) cut and dicing before grinding, technical challenges were expected. The paper focused on eliminating the edge cutting issue by considering the appropriate taping lamination technique. Tensionless lamination helped eliminate the horizontal pressure applied into the tape thus mitigating the edge cutting problem.  For future works, the configuration shared in this paper could be applied on wafers with comparable technology.

Pre-assembly edge cut lamination silicon die

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