Lead Scratch Resolution through Wirebonding Process Optimization on QFN Packages
Jonathan Pulido, Frederick Ray Gomez, Edwin Graycochea Jr.
Journal of Engineering Research and Reports · pp. 29–33 · Published 31 Jul 2020
10.9734/jerr/2020/v15i117136Abstract
With the continuous trend of new technologies in semiconductor manufacturing assembly, challenges and issues are unavoidable. This paper presents an improvement done in quad-flat no-leads (QFN) leadframe package to resolve the quantity of unit rejection due to leads scratch underneath the leadframe. Moreover, the reject manifestation was captured after wirebonding process. Parameter optimization particularly for the second bond with the combination of bond force and bond scrubbing parameters was done to totally eliminate this type of issue after wirebonding process. With the wirebonding process optimization and improvement done, a reduction of 95 percent of leads scratch occurrence was achieved.
References (6)
- 1 Handbook of Semiconductor Manufacturing Technology [DOI]
- 2 Meeting the assembly challenges in new semiconductor packaging trend [DOI]
- 3 Reliability of Copper, Gold, Silver, and PCC Wirebonds Subjected to Harsh Environment [DOI]
- 4 Challenges of ultimate ultra-fine pitch process with gold wire & copper wire in QFN packages [DOI]
- 5 Wirebond Process Improvement with Enhanced Stand-off Bias Wire Clamp and Top Plate [DOI]
- 6 Package Design Improvement for Wire Shorting Resolution [DOI]
Cited by 3
Jonathan C. Pulido, E. Graycochea, F. Gomez · 2020
A. Sumagpang, F. Gomez · 2020
A. Sumagpang, F. Gomez · 2020
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