Tool Setup Improvement for Package Scratch Mitigation at End-of-Line Process
A. Sumagpang Jr., F. R. Gomez, R. Rodriguez
Journal of Engineering Research and Reports · pp. 1–5 · Published 6 May 2020
10.9734/jerr/2020/v12i317079Abstract
With new and continuous semiconductor technology trends, challenges in assembly manufacturing are inevitable. This paper focused on the elimination of assembly defects particularly package chip-out and scratch at the singulation end-of-line (EOL) process of a semiconductor device. Simulation using computer-aided design (CAD) tools, actual process replication, and validations were done, eventually verifying and replicating the desired defect signatures. Singulation tool setup of the package was improved and a standardized tool setup was established based on the simulation and actual validations, resulting to at least 90% improvement in assembly EOL process parts per million (ppm) reduction.
Cited by 8
Antonio Sumagpang Jr., Frederick Ray Gomez, Edwin Graycochea Jr. · Journal of Engineering Research and Reports · 2020
A. Sumagpang Jr., F. R. Gomez, R. Rodriguez · Journal of Engineering Research and Reports · 2020
Allen Jay D. Kumawit, Maria Virginia S. Buera, Mariane A. Mendoza, Frederick Ray I. Gomez · Journal of Engineering Research and Reports · 2021
Maria Virginia S. Buera, Mariane A. Mendoza, Frederick Ray I. Gomez · Journal of Engineering Research and Reports · 2021
Mariane A. Mendoza, Maria Virginia S. Buera, F. Gomez · Journal of Engineering Research and Reports · 2021
A. Sumagpang, F. Gomez · 2020
Showing 6 of 8 known citations — external sources report more than can currently be individually listed.
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