Enhanced Wirebonding Technique on QFN Device with Critical Die Reference
Jonathan C. Pulido, Frederick Ray I. Gomez
Journal of Engineering Research and Reports · pp. 57–61 · Published 11 Mar 2021
10.9734/jerr/2021/v20i317283Abstract
Wirebonding is one of the most challenging assembly manufacturing processes in semiconductor packaging industry. This paper discussed the wirebonding challenge and the solution to mitigate misplaced ball issues and prevent pattern recognition alignment errors. Parameter optimization particularly on wirebond looping was done to ensure that the silicon die’s L-fiducial is visible and not obstructed by the wires, which is the operator point or die reference of the unit during wirebonding setup. Ultimately, the optimized wirebonding parameter prevented the pattern recognition alignment error and misplaced ball issues during the lot process. For future works, the configuration and technique could be applied on packages with the similar situation.
Cited by 6
Irish Beltran, Mark Anthony Ramiro, Jerome J. Dinglasan · Journal of Engineering Research and Reports · 2022
Jonathan C. Pulido, F. Gomez, E. Graycochea · 2021
Alyssa Grace S. Gablan, Jerome J. Dinglasan, F. Gomez · 2021
Jerome J. Dinglasan, Leandro D. Saria, F. Gomez · 2021
Jerome J. Dinglasan, F. Gomez, Alyssa Grace S. Gablan · 2021
Jerome J. Dinglasan, Aiza Marie E. Agudon, F. Gomez · 2021
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