Comparison between Spartan-3E and Virtex-6 Technologies on FPGA for UART Transmission
Ramandeep Singh, Sandeep Singh Gill
Journal of Advances in Mathematics and Computer Science · pp. 1240–1245 · Published 27 Feb 2014
10.9734/BJMCS/2014/7539Abstract
This paper presents the hardware implementation of high speed (Universal Asynchronous Receiver/Transmitter) UART using (Field Programmable Gate Array) FPGA. UART is an integrated circuit containing a transmitter (parallel to serial converter) and a receiver (serial to parallel converter) each clocked separately. It transmit 9600 to 34800 bps for transmitting data bit. A high speed UART using 90nm and 40nm technologies has been designed by using FPGA’s Spartan 3E and Virtex 6 synthesized on the xilinx ISE 12.4i in VHDL language. By comparing these two technologies on the basis of number of slices, look up tables, GCLK’s, slice flip-flops and maximum frequency, it was seen that 40nm technology consumes less area and is 3 times faster than 90nm technology.
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