Skip to content
J

Jerome Dinglasan

Publications (7)

Validation of New Substrate Design for the Improvement of Strip Warpage on LGA Packages

Jerome Dinglasan & Mariane Mendoza · Journal of Engineering Research and Reports · 2022

Land grid array or LGA package of semiconductor has been commonly used on our modern technology, from home gadgets up to industrial uses. Improvements to correct product defects and process issues are introduced to have quality products for customer satisfaction. Substrate warpag...

Open access Research Article 10.9734/jerr/2022/v23i317600

Glass Die Ink Marking Media Selection for a Robust Glass Attach Process

Jerome Dinglasan, Aiza Marie Agudon & Frederick Ray Gomez · Journal of Engineering Research and Reports · 2021

Glass material used on a semiconductor device for isolating currents are one of the new breakthroughs of the modern world. Challenges are inevitable due to its complex characteristics and unique appearance. The study focuses on the phenomenon of reject glass die unrecognized, pic...

Open access Research Article 10.9734/jerr/2021/v20i817365

Die Attach Curing Program Automation of N2 Parameter for Process Robustness

Jerome Dinglasan, Rogel Dela Rosa & Frederick Ray Gomez · Journal of Engineering Research and Reports · 2021

In the world of semiconductor industry, automation plays a big role on every manufacturing plants to improve efficiency, prevent product yield losses, and making sure that top quality products will be delivered on end user. On die attach curing process of manufacturing semiconduc...

Open access Research Article 10.9734/jerr/2021/v20i417304

Improved Die Attribute Recognition via Colored Glass Wafer

Alyssa Grace Gablan, Jerome Dinglasan & Frederick Ray Gomez · Journal of Engineering Research and Reports · 2021

The rise of various Wafer technologies has been developed based on industries and applications requirement. Highest quality of material characterization is complex and requires specialized process equipment and manufacturing procedures to meet defined design standards. The paper...

Open access Research Article 10.9734/jerr/2021/v20i617332

A Systematic Approach to Reduce Wirebond defects caused by Tight Wire Loop Profile on Ball Grid Array Packages

Irish Beltran, Mark Anthony Ramiro & Jerome Dinglasan · Journal of Engineering Research and Reports · 2022

Wirebond quality aspects on a semiconductor manufacturing is one of the key factors to be considered in having a robust product. Certain criteria are defined, met, and affects the output on the product. Other variables from downstream process are also taken in account to affect t...

Open access Research Article 10.9734/jerr/2022/v22i217522

Enhanced Die Attach Process Defect Recognition on QFN Leadframe Packages

Marque Ryan Salcedo, Alyssa Grace Gablan, Jerome Dinglasan & Frederick Ray Gomez · Journal of Engineering Research and Reports · 2021

Advanced packaging at the back-end semiconductor manufacturing characterizes various equipment capabilities per device requirement. High resolution imaging for inspection system during die attach process has gained its interest to feature automated selections during in-line proce...

Open access Research Article 10.9734/jerr/2021/v20i317286

Understanding the Cause and Effect of Bent Side Rail in Molding Process

Mariane Mendoza, Maria Virginia Buera, Joel Pablo & Jerome Dinglasan · Journal of Engineering Research and Reports · 2022

During processing of Quad Flat No-lead (QFN) on the production line, it has been observed that strips were found with bent rails after the molding process. Mold is a process in the semiconductor industry where package encapsulation happens by filling the cavities with molding com...

Open access Research Article 10.9734/jerr/2022/v22i1117573