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Research Article Open access CC BY 4.0

Mitigating Wire Short Defect on LGA Device through Substrate Design Optimization

J. Pulido, R. Rodriguez, F. R. Gomez, E. Graycochea Jr.

Journal of Engineering Research and Reports · pp. 85–88 · Published 23 Mar 2021

10.9734/jerr/2021/v20i417297

Abstract

During new product development of a substrate land grid array (LGA) device, issues were encountered at wirebonding process due to design constraints. This paper is focused on addressing the wire-to-wire short defect during wirebonding process of the first bond. Wirebond process optimization was comprehensively employed, but eventually recommended to have a substrate redesign with relocated bond fingers to increase the wire angle (less steep) between the first bond and the second bond. With the improvement done in the substrate design and through wirebond process optimization, wire-to-wire short defect occurrence was successfully eliminated.

Bond finger LGA substrate wire short wirebond process

References (10)

  1. 1 Fine pitch probing and wirebonding and reliability of aluminum capped copper bond pads [DOI]
  2. 2 Reliability of Copper, Gold, Silver, and PCC Wirebonds Subjected to Harsh Environment [DOI]
  3. 3 Enhanced Loop Height Optimization for Complex Configuration on QFN Device [DOI]
  4. 4 Understanding Non-Stick on Lead Wirebond Failure Due to Leadfinger Surface Roughness [DOI]
  5. 5 The behavior of FAB (free air ball) and HAZ (heat affected zone) in fine gold wire [DOI]
  6. 6 Wirebond Process Improvement with Enhanced Stand-off Bias Wire Clamp and Top Plate [DOI]
  7. 7 Wire Shorting Elimination through Wirebond Process Optimization of Semiconductor Sensor Device [DOI]
  8. 8 Non-stick on Pad Defect Reduction through Clamp and Insert Design Augmentation [DOI]
  9. 9 Wirebonding Characterization and Optimization on Thick Filmsu-8 MEMS Structures and Actuators [DOI]
  10. 10 Non-continuous IMC in copper wirebonding: Key factor affecting the reliability [DOI]

Cited by 1

A Systematic Approach to Reduce Wirebond defects caused by Tight Wire Loop Profile on Ball Grid Array Packages

Irish Beltran, Mark Anthony Ramiro, Jerome J. Dinglasan · Journal of Engineering Research and Reports · 2022

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